Answer Posted / prabhath

SelectionSort(A)
for i <- length[A]-1 downto 0
for j <- 0 to i
if (A[j]>MAX) // for descending, change this to MIN
MAX=A[j]
MAX_ID=j

temp=A[i]
A[i]=A[MAX_ID]
A[MAX_ID]=temp

Slow motion run of Selection Sort (Bold == sorted region):

5 1 3 2 4
4 1 3 2 5
1 3 2 4 5
1 2 3 4 5
1 2 3 4 5
1 2 3 4 5 >> done

What are the main issues associated with multiprocessor caches and how might you solve them?

2206

---

Draw the stick diagram of a NOR gate. Optimize it

1261

---

Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

1086

---

Explain about 6-T XOR gate?

1238

---

why is the number of gate inputs to CMOS gates usually limited to four?

1322

---

Mention what are the different gates where Boolean logic are applicable?

1097

---

What is Body Effect?

2499

---

Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3853

---

what is multiplexer?

1146

---

For CMOS logic, give the various techniques you know to minimize power consumption

1384

---

Describe the various effects of scaling?

4769

---

what is a sequential circuit?

1140

---

Explain the working of Insights of a pass gate ?

1210

---

How does Vbe and Ic change with temperature?

3502

---

What are the steps involved in designing an optimal pad ring?

1153

---