Differences between D-Latch and D flip-flop?
Answer Posted / t.murugan
D-latch is level Triggering and D Flip Flop is Edge
triggering.
| Is This Answer Correct ? | 308 Yes | 20 No |
Post New Answer View All Answers
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
What does the above code synthesize to?
What is the ideal input and output resistance of a current source?
Explain various adders and difference between them?
what is Slack?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
What is Noise Margin? Explain the procedure to determine Noise Margin?
Explain the operation considering a two processor computer system with a cache for each processor.
Explain what is multiplexer?
Explain Cross section of an NMOS transistor?
what is the difference between the TTL chips and CMOS chips?
What are the changes that are provided to meet design power targets?
What does it mean “the channel is pinched off”?