Interested to Buy Any Domain ? << Click Here >> for more details...
Are you familiar with VHDL and/or Verilog?
- 17 Answers
- 28162 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / prasadrddy
Very large scale hardware descriptive language
| Is This Answer Correct ? | 3 Yes | 8 No |
Post New Answer View All Answers
What are the different gates where boolean logic are applicable?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
How to improve these parameters? (Cascode topology, use long channel transistors)
What are the different measures that are required to achieve the design for better yield?
Draw a 6-T SRAM Cell and explain the Read and Write operations
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
Insights of a 4bit adder/Sub Circuit?
How does a Bandgap Voltage reference work?
what is verilog?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
Differences between Array and Booth Multipliers?
Explain what is the use of defpararm?
How binary number can give a signal or convert into a digital signal?
Explain what is Verilog?
What is the difference between synchronous and asynchronous reset?
