Are you familiar with VHDL and/or Verilog?
Answer Posted / radha
Im familiar with verilog
| Is This Answer Correct ? | 6 Yes | 4 No |
Post New Answer View All Answers
6-T XOR gate?
Describe the various effects of scaling?
You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
What was your role in the silicon evaluation or product ramp? What tools did you use?
Explain why is the number of gate inputs to cmos gates usually limited to four?
Explain the working of Insights of a pass gate ?
Give various factors on which threshold voltage depends.
How does Vbe and Ic change with temperature?
What transistor level design tools are you proficient with? What types of designs were they used on?
What is the difference between cmos and bipolar technologies?
Draw a 6-T SRAM Cell and explain the Read and Write operations
If not into production, how far did you follow the design and why did not you see it into production?
For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
Draw a CMOS Inverter. Explain its transfer characteristics