Explain the difference between write through and write back
cache.
Answer Posted / achal ubbott
1. Write Through policy is relatively slower. but offers
advantage of coherence between cache and main memory.
2. Write Back is faster and frquently used. It makes use of
Dirty bit. If the data in cache is not in coherence with
one in main memory then Dirty bit is set.
Is This Answer Correct ? | 12 Yes | 0 No |
Post New Answer View All Answers
What is look up table in vlsi?
Explain the operation of a 6T-SRAM cell?
Explain Cross section of a PMOS transistor?
If not into production, how far did you follow the design and why did not you see it into production?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
What transistor level design tools are you proficient with? What types of designs were they used on?
What is the difference between the mealy and moore state machine?
Are you familiar with the term MESI?
What does it mean “the channel is pinched off”?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.
Insights of a 4bit adder/Sub Circuit?
what is a sequential circuit?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.