if earthing is used in place of neutral how the circuit
completd.
- 7 Answers
- 15380 Views
- Epitome, I also Faced
- E-Mail Answers
Answer Posted / odokoshene
Current will always find a low potential path.Since earth
is at low potential ,the circuit will complete its path
throgh earth.In case of three phase star conneted load,
earthing cannot be used as neutral and such case will have
floating neutral
| Is This Answer Correct ? | 4 Yes | 1 No |
Post New Answer View All Answers
In PFI plant one stage capacitor connection is directly connected(with out megnetic contact controll). but why?
Draw a SLD for main panel for school having connected load of 1200kw and emergency generator 200kw.also show the increase of additional load of chiller 225kw in the lv panel indicating meter postion size of transformer ,cables and capacitor bank.
sir& friends i want the collection of recent quetions asked in interview of top most companies please send me on my email san.jsr@hotmail.com
where can i get vijaya electricals limited in hyderabad interview auestions can u give me the website address plz
hi plz send me reliance placement papers..i.e electrical technical papers that have been asked in reliance test.
hi friend i am going too attend for hpcl in this month please help me by sending written test question papers i am in the stream of E.E.E
when will be the iocl interview results i faced interview on 8th september 2008 iam from electrical branch i faced interview for the post of electrical engineer??????????????????????//
can you plz send l&t aptitude questions if available its urgent plz plz plz
Please send 110 kv sb station full single line drawing(sld)
What is the basic principal, by which DC voltage level is increased more than the supplied AC voltage during conversion. As upto AC level it is contorrled by firing anlge but after maximum level how is it possible.Please clear picture. OR we have to supply the higher level AC?
pls someone send me sample question papers along with the key.thanks in advance
i need the curve duty cycle and amper for (150 kva @50% dyty cycle) transformer turn ratio :19 and vin 400
If not into production, how far did you follow the design and why did not you see it into production?
What types of CMOS memories have you designed? What were their size? Speed? Configuration Process technology?
please send me the previous year's question papers of jindal GET exams
