Interested to Buy Any Domain ? << Click Here >> for more details...
Answer Posted / raju
timer change its state periodically,it time period depends
only on ckt values.
counter change its when apulse is apllied, its timeperiod
not depend on ckt value.
| Is This Answer Correct ? | 22 Yes | 3 No |
Post New Answer View All Answers
What is a stage?
The output of the rectifier pulsating in nature, it consists of a desired dc component of voltage and unwanted ripple components. These ripple components are removed by placing filter circuit at the output of the rectifier.
why we use low and high radio band in m/w link at both end
describe the functioning of parallel adder ? what are the adventages of parallel adder over series adder?
Guroscope works on the basis of what?
Is M-ary PSK bandwidth efficient or power efficient
How to calibrate differential pressure switch
Explain how to manufacture the cmos inverter?
how does modulation reduce bandwidth
1 explain advantage and dis advantages of FIR filters compared to IIRcouterparts ? 2 what is the need of filtering,ideal response of filters and actual response of filters ? 3 what is CMRR ? 4 which semiconductor device is used ad a voltage regulator and why ? 5 how can we rectify race around condition ?
The output of a 60hz full-wave bridge rectifier has a 60 hz ripple. It this circuit working properly?
1. What is leakage current? 2. Transistor VI characters? Explain. 3. What is dc load line? 4. Differential amplifier circuit. 5. Recursive interrupts. 6. Diagram case microcontroller and Eprom 7. Use of grey code? 8. Design counter from 1 to 11. 9. Characteristic impedence?Z0 value of probe used in lab. 10. 3 input TTL logic. 11. What is Pseudo random sequence? Why it is called so? 12. What is stack? 13. Different types of voltage regulation?
why the circuit turn off time should be greater than thyristor turn off time?
Derive intrinsic stand off ratio.
What are the disadvantages of continuous gating signal?
