Answer Posted / shahbaz cheema

latches is a asynchronous and have enable pin that is
perform that signal input is high or low.
but the flip flop has the synchronous and have clock input
pin that is mention the signal is low to high and high to
low.

Explain why the input impedance of op-amp is so high?

1100

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if UT=4v & V LT=-2v the hysteresis voltage is equal to......?

2095

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Give more than 15 points for the praical application of demux???

1790

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can i get the 2007-2009 question papers of APGENCO? plzzzzzz

2080

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Explain what is the difference between plc and dcs?

965

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I AM DOING MY ELECTRONICS AND COMMUNICATION ENGINEERING.I NEED SOME SUGGESTIONS REGARDING THE COURSES THAT I CAN STUDY SO THAT I GET BETTER CHANCES FOR JOBS..WAITING FOR SOME SUGGESTIONS IN yamini1825@yahoo.com..THANK YOU

1875

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how can i calculate increase electrical signal power expected at the photodiode detector output given 2 optical loss coefficients and the distance covered using multimode.thank you.

2141

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Explain Power Control.

1970

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Explain why is a two-input nand gate called universal gate?

1113

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I NEED 2006&2007 RAILWAY RECRUITMENT BOARD,JUNIOR ENGINEER (SIGNAL) Q&ANSWERS,PLEASE SEND TO: kaleelbe@yahoo.com

1827

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i having one cisco 2950 switch,but i having no rights of ythis switch,now i want to know switch macc addrerss of particular network ip,how can i resolved?

2251

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Hi friends,anybody can send me previous HAL interview question paper OR all other interview question paper. To, yogeshnature@gmail.com

2042

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hi...i had completed B.E.in Electronics & Communication.i had applied Section Engineer in railway recruit ment 2012.I need previous year exam papers.

2051

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What is point contact diode?

925

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what is the use of FR-4(flame retardant)in PCB design why dielectric material used in inner layer in PCB design technology??

2016

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