no

NOT

Not Same

Multitasking implies time sharing, its like a single person
doing different jobs, obviously at different time slices.
Multiprocessing involves some amount of parallelism, if the
hardware supports (eg: dual core, hyper threading etc.)

CAN :- Implemented by boach
GMLAN:- Implemented for GM for vehicle network an diagnostics

Add the digits and check the sum. It would imply a 3-bit 
adder (max. value = 8 can be represented with three bits) 
and compare the result to 011.

3 input AND those 3 bits. No adder needed...

for serially arriving stream: 
use a 2 bit accumulator( S1 and S2) with outputs O1 and O2. 
Final Output will be Y = ~O1 . O2

For parallel, 
use combinational logic , probably priority encoder to
reduce  delay.

keep the number in A reg and ratate it 8 times if carry 
generates more than 3  it will indicate a non desired numer

step1: start
step2: mov the byte to accumulator
step3: intialize length = 0 , count = 0
step4: rotate acc. to right through carry.
step5: if carry = 1 , increment count
step6: increment length
step7: if length < 8 , goto step3
step8: if count = 3 , (do required action)
step9: end

Step 1:  Store the 8 bit value in a accumulator

Step 2:  Store 0x1 in a register0, initialize two counter  
with 0 i.e. store zero in a reg1 and reg2.

LOOP:
Step 3:  Check if AND operation between the value in
register0 and accumulator is set i.e. 1 
if yes, increment reg1 and reg2
If no, increment only reg2

step 4: Left shift the value of register0 by 1
step 5: if ( reg2 >=8), exit LOOP
                 if ( reg1 >= 3), show that 3 bit is set
        Else Go To LOOP



MOV XAR1, #Data
MOV XAR0, #0
MOV XAR2, #0

Loop:
TBIT *XAR1, #Count 
BF Loop1, NTC
INR *XAR0

Loop1:
INR *XAR2
MOV AL, *XAR1
CMP AL, #0x03
BF Loop3, EQ

MOV AL, *XAR2
CMP AL, #0x80
BF Loop, NEQ

Loop3:
EXIT

Sorry thr was a bit mistake. Corrected : 

MOV XAR1, #Data
MOV XAR0, #0
MOV XAR2, #0

Loop:
TBIT *XAR1, *XAR2 
BF Loop1, NTC
INR *XAR0

Loop1:
INR *XAR2
MOV AL, *XAR0
CMP AL, #0x03
BF Loop3, EQ

MOV AL, *XAR2
CMP AL, #0x80
BF Loop, NEQ

Loop3:
EXIT

I have modified it a bit,

MOVL XAR1, #Data
MOVL XAR0, #0x00
MOVL XAR2, #0x00

Loop:
TBIT *XAR1,#XAR2 
BF Loop1, NTC
INR AR0

Loop1:
INR AR2
MOV AL, *XAR0
CMP AL, @0x03
BF Action, EQ

MOV AL, *XAR2
CMP AL, @0x08
BF Loop, NEQ

Loop3:
EXIT

Action:

You fools...the question is to design a circuit
(hardware)..not writing a program.

Use a 8 bit parallel in serial out shift register. Use the
serial out bit to increment a counter(a 3 bit register), if
its one. After 8 shifts, compare the counter with 011b to
detect 3.

make a 4-bit adder/subtractor ( which can perform A+B and A-
B depending on value of bit say SUB..ie if SUB is 1 it will 
perform A+B ) now give A and B as inputs and make MSB of B 
as SUB bit.
suppose A=0110(6),B=1110(-2);so result will be A-B ie.,   
A+|B|=6-(-2)=8

sequences the instructions..

a) is wrong answer