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Question
`what is race around condition`
Question Submitted By :: Maya
I also faced this Question!!     Rank Answer Posted By

Re: what is race around condition
# 1
in simple jk flip flor circuit
at condition
j=1 and k=1
every time output toggle w.r.t previous output,we use
single clock in this case so that condition known as race
around condition.by using master slave jk flip flop we can
remove this problem.

 Is This Answer Correct ? 160 Yes 40 No
Sahil Gupta

Re: what is race around condition
# 2
when we put j=1 and k=1 in j-k flip flop, the output, Q
toggles to 0 and 1 continuously; and it becomes uncertain
to predict the output. This condition is known as Race
around condition.
It can be rectified using Master-Slave flip flop.

 Is This Answer Correct ? 155 Yes 27 No
Anshuman Kumar Chanchal

Re: what is race around condition
# 3
we know that when j=k=1 in a jk flip flop then output is
the complement of the previous output i.e if j=k=1 and Y=0
then after the clock pulse y becomes 1.
but if the propagation delay of the gates is much lesser
than the pulse duration then during the same pulse at first
y becomes 0 and after another propagation delay y becomes 1
and so on.
thus within the same pulse duration due to very small
propagation delays output oscillates back and forth between
0 and 1. this condition is called race around condition and
at the end of the pulse the output is uncertain.

 Is This Answer Correct ? 220 Yes 6 No
Baisakhi Khasnabis

Re: what is race around condition
# 4
A fliplflop is a basic digital memory circuit.In JK
flipflop when the clock pulse is equal to 1 and also when
j=k=1 , we know that the next state is complement of the
present state.but at that instance if clock pulse is
still '1'(high)the o/p again complements.and it repeats
untill clk puls goes back to '0'.this is race aroud conditn.

This is because that clk puls duratn is more than the
propagatn delay of flipflop.to avoid this we need to adjust
the clk pulse duratn or we need to put restriction on clk
pulse width as
clk pls (t)<propgatn delay using mater slave configuratn

 Is This Answer Correct ? 50 Yes 12 No
Sowmya

Re: what is race around condition
# 5
Race conditions is a severe way crashing the server/ system
at times. Generally this problem arises in priority less
systems or the users who has eqal priority will be put to
this problem. Race condition is a situation in which a
resource D is to be serviced to a process A and the
processB which holds the resoure C is to be given to the
process A. So a cyclic chain occurs and no way the
resources will be get shared and also the systems with
equal prirority wont get the resoure so that the system
wont come out of the blocked state due to race condition!

 Is This Answer Correct ? 14 Yes 25 No
Priya

Re: what is race around condition
# 6
it is timing problem,caused because in the time of tiggering
clock pulse stays in a high state for along time as compare
to propagation delay.

 Is This Answer Correct ? 16 Yes 11 No
Ravi Pandey B.tech. A.i.t.s.h

Re: what is race around condition
# 7
In a JK flip flop when J=1 and K=1 and clock is applied, the
outputs keep on toggling at every delay time of the flip
flop as long as the clock is present.Hence the output at the
end of the clock pulse is ambiguous.This condition is called
race around condition.

 Is This Answer Correct ? 16 Yes 8 No
Nidhi , B.tech 2nd Year ,r.v.s

Re: what is race around condition
# 8
we know that when j=k=1 in a jk flip flop then output is
the complement of the previous output i.e if j=k=1 and Y=0
then after the clock pulse y becomes 1.
but if the propagation delay of the gates is much lesser
than the pulse duration then during the same pulse at first
y becomes 0 and after another propagation delay y becomes 1
and so on.
thus within the same pulse duration due to very small
propagation delays output oscillates back and forth between
0 and 1. this condition is called race around condition and
at the end of the pulse the output is uncertain.
so this can be avoided by using only edgetriggerd ff
rahter than using level triggerd.

 Is This Answer Correct ? 20 Yes 4 No
Abhinandan Kumar

Re: what is race around condition
# 9
Mankada ei gudaka sabu kou bahi ru paila be?
 Is This Answer Correct ? 9 Yes 33 No
Swastik Mishra

Re: what is race around condition
# 10
The condition S=R=1 is not allowed in SR flip-flop, this is
eliminated by JK flip flop by using feedback connection
from output to input of gate 1 and 2 because of the
feedback connection Q(Q')at the i/p to K(J). The i/p will
change during clk pulse CP=1, if the o/p changes the state.

 Is This Answer Correct ? 10 Yes 11 No
Shikha Chauhan

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