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Categories >> Software >> Embedded Systems >> 86 Family
 
 


 

 
 86 Family interview questions  86 Family Interview Questions (53)
 VLSI interview questions  VLSI Interview Questions (200)
 DSP interview questions  DSP Interview Questions (9)
 Embedded Systems AllOther interview questions  Embedded Systems AllOther Interview Questions (24)
Question
Give a circuit to divide frequency of clock cycle by two ?
 Question Submitted By :: 86-Family
I also faced this Question!!     Answer Posted By  
 
Answer
# 1
take a D Flip Flop. when it is reset output(Q) is zero.
connect the clock which u want to divide to the CP input of
FF. connect Q bar (which is one after the reset)to the D
input of Flip Flop. Take the output from the Q pin of the
Flip Flop, which is divided by two
 
Is This Answer Correct ?    23 Yes 2 No
Sravan
 
Answer
# 2
a T flip flop act as a frequency divider 
Is This Answer Correct ?    22 Yes 4 No
Subashini
 
 
 
Answer
# 3
T FLIP FLOP WILL ACT AS A DEVIDE BY 2 CKT 
Is This Answer Correct ?    13 Yes 1 No
Rajanikanth
 
Answer
# 4
take an xor gate, connect output to one of the input of xor gate and other input as the clock. verilog code for the same is given below
module a(input in,rst,output reg ot);
always @(in or rst)
begin
if(rst)
ot<=0;
else
ot<=ot ^ in;
end
endmodule
 
Is This Answer Correct ?    0 Yes 0 No
Harikrishna H
 
Answer
# 5
any single flip flop itself is a freqency divider circuit 
Is This Answer Correct ?    13 Yes 14 No
Priyanka Kokil
 
Answer
# 6
Divide the clock frequency by 2
A 2:1 MUX with CLK as select signal. The 0 select input is just the output. The 1 select input is output_bar(NOT output).
 
Is This Answer Correct ?    1 Yes 3 No
Manish Sharma
 

 
 
 
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