| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| Why is Extraction performed? | Intel | 1 |
| What are set up time & hold time constraints? What do they
signify? | | 1 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| Factors affecting Power Consumption on a chip? | Intel | 1 |
| what is Early effects and their physical origin. | | 1 |
| What is LVS, DRC? | Intel | 4 |
| Explain the difference between write through and write back
cache. | Intel | 1 |
| Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
| | 3 |
| What happens when the gate oxide is very thin? | Intel | 2 |
| What is setup time and hold time? | Intel | 1 |
| Give the expression for CMOS switching power dissipation? | | 2 |
| what is short Channel effect. | | 1 |
| Differences between DRAM and SRAM? | Intel | 4 |
| What happens to delay if we include a resistance at the
output of a CMOS circuit? | | 1 |
| Implement D flip-flop with a couple of latches? Write a VHDL
Code for a D flip-flop? | Intel | 3 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of
an instruction in a 5 stage machine? What is the throughput
of this machine ? | Intel | 2 |
| What are the two types of noise of MOSFET, how to eliminate
them?(Thermal and Flicker). | Analog-Devices | 2 |
| What is SPICE? | Intel | 1 |
| Explain the concept of a Clock Divider Circuit? Write a VHDL
code for the same? | Intel | 1 |
| You have a driver that drives a long signal & connects to an
input device. At the input device there is either overshoot,
undershoot or signal threshold violations, what can be done
to correct this problem? | Intel | 3 |
| |
| For more VLSI Interview Questions Click Here |
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