| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency
of an instruction in a 5 stage machine? What is the
throughput of this machine ? | Intel | 2 |
| Define threshold voltage? | Intel | 3 |
| What is LVS, DRC? | Intel | 4 |
| Give the expression for CMOS switching power dissipation? | | 2 |
| Explain about stuck at fault models, scan design, BIST and
IDDQ testing? | Intel | 1 |
| What is charge sharing? | Intel | 1 |
| What is Noise Margin? Explain the procedure to determine
Noise Margin? | Cisco | 2 |
| What are the main issues associated with multiprocessor
caches and how might you solve them? | Intel | 1 |
| What are the different limitations in increasing the power
supply to reduce delay? | | 1 |
| Differences between DRAM and SRAM? | Intel | 4 |
| what is short Channel effect. | | 1 |
| Differences between blocking and Non-blocking statements in
Verilog? | Intel | 3 |
| Explain the various Capacitances associated with a
transistor and which one of them is the most prominent? | Intel | 1 |
| How do you detect if two 8-bit signals are same? | | 4 |
| What happens when the gate oxide is very thin? | Intel | 2 |
| Differences between D-Latch and D flip-flop? | Intel | 6 |
| What are set up time & hold time constraints? What do they
signify? | | 1 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| What is validation? | Intel | 1 |
| You have a driver that drives a long signal & connects to an
input device. At the input device there is either overshoot,
undershoot or signal threshold violations, what can be done
to correct this problem? | Intel | 3 |
| |
| For more VLSI Interview Questions Click Here |
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