| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| What happens to delay if we include a resistance at the
output of a CMOS circuit? | | 1 |
| Factors affecting Power Consumption on a chip? | Intel | 1 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| What is polymorphism? (C++) | Intel | 1 |
| What is SPICE? | Intel | 1 |
| Explain about stuck at fault models, scan design, BIST and
IDDQ testing? | Intel | 1 |
| what is body effect? | | 1 |
| Give the various techniques you know to minimize power
consumption? | | 3 |
| How do you detect if two 8-bit signals are same? | | 4 |
| What is FPGA? | Intel | 2 |
| what is Latch up?How to avoid Latch up? | | 2 |
| What happens to delay if you increase load capacitance? | | 2 |
| What is charge sharing? | Intel | 1 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency
of an instruction in a 5 stage machine? What is the
throughput of this machine ? | Intel | 2 |
| Explain the various Capacitances associated with a
transistor and which one of them is the most prominent? | Intel | 1 |
| What is Cross Talk? | Intel | 2 |
| Define threshold voltage? | Intel | 3 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of
an instruction in a 5 stage machine? What is the throughput
of this machine ? | Intel | 2 |
| You have a driver that drives a long signal & connects to an
input device. At the input device there is either overshoot,
undershoot or signal threshold violations, what can be done
to correct this problem? | Intel | 3 |
| What are set up time & hold time constraints? What do they
signify? | | 1 |
| |
| For more VLSI Interview Questions Click Here |
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