| Other VLSI Interview Questions |
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| Question | Asked @ | Answers |
| |
| What is Fowler-Nordheim Tunneling? | Intel | 1 |
| Are you familiar with VHDL and/or Verilog? | Intel | 4 |
| What happens to delay if you increase load capacitance? | | 2 |
| How do you detect if two 8-bit signals are same? | | 4 |
| what is Latch up?How to avoid Latch up? | | 2 |
| Implement F = AB+C using CMOS gates? | Intel | 1 |
| Explain the concept of a Clock Divider Circuit? Write a VHDL
code for the same? | Intel | 1 |
| What are set up time & hold time constraints? What do they
signify? | | 1 |
| What are the main issues associated with multiprocessor
caches and how might you solve them? | Intel | 1 |
| Explain the various Capacitances associated with a
transistor and which one of them is the most prominent? | Intel | 1 |
| How does Resistance of the metal lines vary with increasing
thickness and increasing length? | | 1 |
| what is Early effects and their physical origin. | | 1 |
| For a 0.18um and 0.8um technology MOSFET, which has a higher
cutoff frequency? | | 1 |
| Who provides the DRC rules? | Intel | 3 |
| You have a driver that drives a long signal & connects to an
input device. At the input device there is either overshoot,
undershoot or signal threshold violations, what can be done
to correct this problem? | Intel | 3 |
| For a single computer processor computer system, what is the
purpose of a processor cache and describe its operation? | Intel | 1 |
| Implement an Inverter using a single transistor? | Intel | 1 |
| Explain the difference between write through and write back
cache. | Intel | 1 |
| What is SPICE? | Intel | 1 |
| What is charge sharing? | Intel | 1 |
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