| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| What is charge sharing? | Intel | 1 |
| How many bit combinations are there in a byte? | Intel | 4 |
| Factors affecting Power Consumption on a chip? | Intel | 1 |
| Explain the various Capacitances associated with a
transistor and which one of them is the most prominent? | Intel | 1 |
| Explain about stuck at fault models, scan design, BIST and
IDDQ testing? | Intel | 1 |
| What is Cross Talk? | Intel | 2 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| What are the different limitations in increasing the power
supply to reduce delay? | | 1 |
| Implement D flip-flop with a couple of latches? Write a VHDL
Code for a D flip-flop? | Intel | 3 |
| What happens to delay if you increase load capacitance? | | 2 |
| Give the expression for CMOS switching power dissipation? | | 2 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of
an instruction in a 5 stage machine? What is the throughput
of this machine ? | Intel | 2 |
| Are you familiar with the term snooping? | Intel | 1 |
| what is Latch up?How to avoid Latch up? | | 2 |
| What are the two types of noise of MOSFET, how to eliminate
them?(Thermal and Flicker). | Analog-Devices | 2 |
| How to find the read failiure probablity in SRAM?
| | 1 |
| For f = AB+CD if B is S-a-1, what r the test vectors needed
to detect the fault? | Intel | 1 |
| What is the most complicated/valuable program you written in
C/C++? | Intel | 6 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency
of an instruction in a 5 stage machine? What is the
throughput of this machine ? | Intel | 2 |
| What is the difference between = and == in C? | Intel | 5 |
| |
| For more VLSI Interview Questions Click Here |
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