| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| Implement F = AB+C using CMOS gates? | Intel | 1 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| Who provides the DRC rules? | Intel | 3 |
| Explain Clock Skew? | Intel | 2 |
| What is Noise Margin? Explain the procedure to determine
Noise Margin? | Cisco | 2 |
| Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
| | 3 |
| How do you detect a sequence of "1101" arriving serially
from a signal line?
| nvidia | 2 |
| Differences between D-Latch and D flip-flop? | Intel | 6 |
| What is SPICE? | Intel | 1 |
| What is the most complicated/valuable program you written in
C/C++? | Intel | 6 |
| What is LVS, DRC? | Intel | 4 |
| How many bit combinations are there in a byte? | Intel | 4 |
| Have you studied buses? What types? | Intel | 1 |
| What are set up time & hold time constraints? What do they
signify? | | 1 |
| For f = AB+CD if B is S-a-1, what r the test vectors needed
to detect the fault? | Intel | 1 |
| For a 0.18um and 0.8um technology MOSFET, which has a higher
cutoff frequency? | | 1 |
| what is body effect? | | 1 |
| Are you familiar with the term MESI? | Intel | 1 |
| What is charge sharing? | Intel | 1 |
| How does Resistance of the metal lines vary with increasing
thickness and increasing length? | | 1 |
| |
| For more VLSI Interview Questions Click Here |
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