| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| What are the main issues associated with multiprocessor
caches and how might you solve them? | Intel | 1 |
| Give the expression for CMOS switching power dissipation? | | 2 |
| What is LVS, DRC? | Intel | 4 |
| What is setup time and hold time? | Intel | 1 |
| How do you detect if two 8-bit signals are same? | | 4 |
| Differences between Signals and Variables in VHDL? If the
same code is written using Signals and Variables what does
it synthesize to? | Intel | 1 |
| For a single computer processor computer system, what is the
purpose of a processor cache and describe its operation? | Intel | 1 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of
an instruction in a 5 stage machine? What is the throughput
of this machine ? | Intel | 2 |
| What are the limitations in increasing the power supply to
reduce delay? | | 1 |
| Are you familiar with VHDL and/or Verilog? | Intel | 4 |
| what is body effect? | | 1 |
| Implement D flip-flop with a couple of latches? Write a VHDL
Code for a D flip-flop? | Intel | 3 |
| What happens when the gate oxide is very thin? | Intel | 2 |
| Explain Clock Skew? | Intel | 2 |
| How to find the read failiure probablity in SRAM?
| | 1 |
| For a 0.18um and 0.8um technology MOSFET, which has a higher
cutoff frequency? | | 1 |
| Why is Extraction performed? | Intel | 1 |
| What is the difference between = and == in C? | Intel | 5 |
| Define threshold voltage? | Intel | 3 |
| What happens to delay if we include a resistance at the
output of a CMOS circuit? | | 1 |
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