| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| What is FPGA? | Intel | 2 |
| Are you familiar with VHDL and/or Verilog? | Intel | 4 |
| Differences between Signals and Variables in VHDL? If the
same code is written using Signals and Variables what does
it synthesize to? | Intel | 1 |
| What is Noise Margin? Explain the procedure to determine
Noise Margin? | Cisco | 2 |
| What are the main issues associated with multiprocessor
caches and how might you solve them? | Intel | 1 |
| What is Cross Talk? | Intel | 2 |
| what is body effect? | | 1 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| How do you detect if two 8-bit signals are same? | | 4 |
| Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency
of an instruction in a 5 stage machine? What is the
throughput of this machine ? | Intel | 2 |
| What is LVS, DRC? | Intel | 4 |
| Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why? | Intel | 6 |
| Differences between D-Latch and D flip-flop? | Intel | 6 |
| Explain the difference between write through and write back
cache. | Intel | 1 |
| Differences between blocking and Non-blocking statements in
Verilog? | Intel | 3 |
| Are you familiar with the term snooping? | Intel | 1 |
| Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
| | 3 |
| what is Early effects and their physical origin. | | 1 |
| For a 0.18um and 0.8um technology MOSFET, which has a higher
cutoff frequency? | | 1 |
| What is the difference between = and == in C? | Intel | 5 |
| |
| For more VLSI Interview Questions Click Here |
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