| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| In what cases do you need to double clock a signal before
presenting it to a synchronous state machine? | Intel | 2 |
| Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
| | 3 |
| What is validation? | Intel | 1 |
| What is charge sharing? | Intel | 1 |
| A circuit has 1 input X and 2 outputs A and B. If X = HIGH
for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B =
1. Draw a state diagram for this Spec? | Intel | 1 |
| What is the most complicated/valuable program you written in
C/C++? | Intel | 6 |
| Are you familiar with the term MESI? | Intel | 1 |
| Implement F = AB+C using CMOS gates? | Intel | 1 |
| What is the difference between = and == in C? | Intel | 5 |
| Implement an Inverter using a single transistor? | Intel | 1 |
| How do you detect a sequence of "1101" arriving serially
from a signal line?
| nvidia | 2 |
| Explain the various Capacitances associated with a
transistor and which one of them is the most prominent? | Intel | 1 |
| What is Noise Margin? Explain the procedure to determine
Noise Margin? | Cisco | 2 |
| Explain Clock Skew? | Intel | 2 |
| what is Latch up?How to avoid Latch up? | | 2 |
| What is Fowler-Nordheim Tunneling? | Intel | 1 |
| What are the main issues associated with multiprocessor
caches and how might you solve them? | Intel | 1 |
| Define threshold voltage? | Intel | 3 |
| Why is Extraction performed? | Intel | 1 |
| Have you studied buses? What types? | Intel | 1 |
| |
| For more VLSI Interview Questions Click Here |
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