| Other VLSI Interview Questions |
| |
| Question | Asked @ | Answers |
| |
| What is validation? | Intel | 1 |
| How does Resistance of the metal lines vary with increasing
thickness and increasing length? | | 1 |
| what is body effect? | | 1 |
| What is SPICE? | Intel | 1 |
| Differences between Signals and Variables in VHDL? If the
same code is written using Signals and Variables what does
it synthesize to? | Intel | 1 |
| what is short Channel effect. | | 1 |
| What is a linked list? Explain the 2 fields in a linked list? | Intel | 1 |
| For a single computer processor computer system, what is the
purpose of a processor cache and describe its operation? | Intel | 1 |
| What is charge sharing? | Intel | 1 |
| Explain about stuck at fault models, scan design, BIST and
IDDQ testing? | Intel | 1 |
| What is the most complicated/valuable program you written in
C/C++? | Intel | 6 |
| Have you studied buses? What types? | Intel | 1 |
| What is the difference between = and == in C? | Intel | 5 |
| What are the different limitations in increasing the power
supply to reduce delay? | | 1 |
| what is Latch up?How to avoid Latch up? | | 2 |
| Define threshold voltage? | Intel | 3 |
| Explain Clock Skew? | Intel | 2 |
| Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
| | 3 |
| What types of high speed CMOS circuits have you designed? | Intel | 1 |
| Give the various techniques you know to minimize power
consumption? | | 3 |
| |
| For more VLSI Interview Questions Click Here |
Site Map
