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Categories  >>  Software  >>  Embedded Systems  >>  VLSI        Suggest New Category      Question  Asked @ Answers Views     select   Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads. Intel  0  76 Are you familiar with the term snooping? Intel  1  824 Are you familiar with the term MESI? Intel  1  1603 Explain the difference between write through and write back cache. Intel  1  1967 What are the main issues associated with multiprocessor caches and how might you solve them? Intel   1  467 Explain the operation considering a two processor computer system with a cache for each processor. Intel  0  44 For a single computer processor computer system, what is the purpose of a processor cache and describe its operation? Intel  1  416 How many bit combinations are there in a byte? Intel  4  1626 Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ? Intel  2  815 Have you studied buses? What types? Intel  1  1268 Basic Stuff related to Perl? Intel  0  60 Insights of a Tri-State Inverter? Intel  0  61 Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why? Intel  6  2134 Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same? Intel  1  687 Differences between Array and Booth Multipliers? Intel  0  45 E-Mail New Answers        Answer Selected Questions     Prev    1    [2]   3   4   5   6   7   8   9   10   11   12   13    Next         86 Family Interview Questions     VLSI Interview Questions     DSP Interview Questions     Embedded Systems AllOther Interview Questions       Un-Answered Questions    Question Views Asked at   Select   Are you familiar with the term snooping? 168 Intel What happens if we delay the enabling of Clock signal? 57   Advantages and disadvantages of Mealy and Moore? 69 Intel Differences between functions and Procedures in VHDL? 57 Intel Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc? 37 Intel How can you model a SRAM at RTL Level? 123   What work have you done on full chip Clock and Power distribution? What process technology and budgets were used? 65 Intel In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why? 117   What?s the difference between Testing & Verification? 71   What r the phenomenon which come into play when the devices are scaled to the sub-micron lengths? 43 Intel Are you familiar with the term MESI? 50 Intel What happens if we delay the enabling of Clock signal? 52   What is the critical path in a SRAM? 61   Implement a function with both ratioed and domino logic and merits and demerits of each logic? 48 Intel Explain the operation considering a two processor computer system with a cache for each processor. 50 Intel Explain the difference between write through and write back cache. 114 Intel If not into production, how far did you follow the design and why did not you see it into production? 40 Intel Explain the usage of the shared SPI bus? 61   what is Channel length modulation? 75   6-T XOR gate? 64 Intel E-Mail New Answers        Answer Selected Questions

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