Advertise your Business Here      Browse  |   Placement Papers  |   Company  |   Code Snippets  |   Certifications  |   Visa Questions Post Question  |   Post Answer  |   My Panel  |   Search  |   Articles  |   Topics  |   ERRORS new    Refer this Site               Login  |  Sign Up                         SiteMap shows list of All Categories in this site.

Categories  >>  Software  >>  Embedded Systems  >>  VLSI        Suggest New Category      Question  Asked @ Answers Views     select   Explain the Charge Sharing problem while sampling data from a Bus?  0  26 Give the various techniques you know to minimize power consumption?  3  638 What happens if we increase the number of contacts or via from one metal layer to the next?  0  78 How does Resistance of the metal lines vary with increasing thickness and increasing length?  1  270 What are the limitations in increasing the power supply to reduce delay?  1  93 What happens to delay if you increase load capacitance?  0  75 What is Body Effect? CG-CoreEL  0  48 Give the expression for CMOS switching power dissipation? Cypress-Semiconductor  0  116 What is Noise Margin? Explain the procedure to determine Noise Margin?  0  69 How do you size NMOS and PMOS transistors to increase the threshold voltage?  0  31 Explain sizing of the inverter?  0  55 Explain CMOS Inverter transfer characteristics?  0  92 Explain the various MOSFET Capacitances & their significance?  0  74 Explain why & how a MOSFET works?  0  76 Explain the Charge Sharing problem while sampling data from a Bus?  0  68 E-Mail New Answers        Answer Selected Questions     Prev    1   2   3   4   5   6   7   8   9    [10]   11   12   13    Next         86 Family Interview Questions     VLSI Interview Questions     DSP Interview Questions     Embedded Systems AllOther Interview Questions       Un-Answered Questions    Question Views Asked at   Select   Why do we use a Clock tree? 62 Intel How does a Bandgap Voltage reference work? 77   How can you model a SRAM at RTL Level? 76   Explain the operation of a 6T-SRAM cell? 115 Intel Explain the difference between write through and write back cache. 114 Intel Working of a 2-stage OPAMP? 61 Intel What types of CMOS memories have you designed? What were their size? Speed? 104 Intel Write a pseudo code for sorting the numbers in an array? 63 Intel Differences between functions and Procedures in VHDL? 57 Intel Explain the usage of the shared SPI bus? 61   In what cases do you need to double clock a signal before presenting it to a synchronous state machine? 54 Intel Implement F= not (AB+CD) using CMOS gates? 49 Intel What is the build-in potential? 76   Explain ASIC Design Flow? 71 Intel Cross section of an NMOS transistor? 58 Intel Insights of a 4bit adder/Sub Circuit? 83 Intel Insights of a 2 input NOR gate. Explain the working? 59 Intel Id vs. Vds Characteristics of NMOS and PMOS transistors? 75 Intel what is Channel length modulation? 75   What are the ways to Optimize the Performance of a Difference Amplifier? 125   E-Mail New Answers        Answer Selected Questions

Copyright Policy  |  Terms of Service  |  Help  |  Site Map 1  |  Articles  |  Site Map  |   Site Map  |  Contact Us |            Copyright © 2007  ALLInterview.com.  All Rights Reserved. ALLInterview.com   ::  Forum9.com   ::  KalAajKal.com