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Draw a Transmission Gate-based D-Latch?
0
160
Give the truth table for a Half Adder, Give a gate level implementation of the same?
Wipro
1
1289
What are the different Adder circuits you studied?
3
1365
The answer to the above question is breaking the combinational circuit and pipelining it. What will be affected if you do this?
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Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal?
Wipro
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Design a divide-by-3 sequential circuit with 50% duty circle?
1
863
Give a circuit to divide frequency of clock cycle by two ?
2
1448
What are set up time & hold time constraints What do they signify Which one is critical for estimating maximum clock frequency of a circuit?
AMD
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Given a circuit, draw its exact timing response?
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Give two ways of converting a two input NAND gate to an inverter ?
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What is the most complicated/valuable program you written in C/C++?
Intel
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If not into production, how far did you follow the design and why did not you see it into production?
Intel
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87
What was your role in the silicon evaluation/product ramp? What tools did you use?
Intel
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What products have you designed which have entered high volume production?
Intel
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What transistor level design tools are you proficient with? What types of designs were they used on?
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What is charge sharing?
38
Intel
What is the depletion region?
60
Why is OOPS called OOPS? (C++)
34
Intel
Insights of a Tri-State Inverter?
47
Intel
Insights of a 2 input NAND gate. Explain the working?
37
Intel
What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
78
Intel
What types of high speed CMOS circuits have you designed?
18
Intel
Explain the Charge Sharing problem while sampling data from a Bus?
17
What was your role in the silicon evaluation or product ramp? What tools did you use?
26
Intel
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
33
Intel
What is Body Effect?
39
CG-CoreEL
Explain the various MOSFET Capacitances & their significance ?
35
Insights of a 2 input NOR gate. Explain the working?
41
Intel
Different ways of implementing a comparator?
46
Intel
How do you size NMOS and PMOS transistors to increase the threshold voltage?
22
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
40
Intel
What products have you designed which have entered high volume production?
119
Intel
How does a pn junction works?
61
Cross section of an NMOS transistor?
44
Intel
Insights of an inverter. Explain the working?
62
Intel
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